Given a linked list which happens to sit on consecutive memory, traversing it can take advantage of L1 cache. However it's possible to squeeze more performance by hinting the branch predictor to allow speculative execution, resulting in better parallelism with cpu pipeline. This is a simple and interesting trick although I can't think of much practical uses except for specific scenarios.

An introduction to various graphical tracing and profiling tools.

A nice article on the exploration of a performance issue, which ultimately leads to the discovery of a bug in AMD CPU.

Good performance tips and suggestion of profiling tools, specialized crates, etc.

it's about how to write high performance for modern cpu architecture.

<blockquote>CPU Utilization is Wrong</blockquote>

<blockquote>Explanation of everything you can see in htop/top on Linux</blockquote>